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500强企业诚聘数字电视接收机FPGA设计研发工程师
作者:佚名  来源:流媒体网  发布时间:2007-7-12 17:53:13

    Our client is a fortune 500 high-tech company, now we are looking for the following position. Anyone who has interest, pls send your updated CV to tchen@antal.com.cn


    Thanks!

     注:发送简历请注明信息来源流媒体网


    部门/实验室 :通信                                           任职地点:北京


    直接报告主管/  职位 :组内负责人 (Title TBC)                           职级:


    职位空缺: 2 (CRBJCOM02) 


    职责总述:


任职者的职责是设计应用在数字电视解调芯片中的算法,并在FPGA平台上实现,验证该算法,


职位描述 :   


- 用HDL语言实现定点算法模块.

- 负责数字广播电视地面/手持接收解调器FPGA实现,调试和验证

- 能从系统级集成所有开发的模块

-  与全球其他研发中心紧密合作,为芯片市场提供更优的解决方案.

- 提出新发明获得专利权

-

-

职位要求 : 


总体要求
- 至少两年的合作项目的经历

- 熟练使用英语,良好的口语与书面交流能力

- 良好的沟通能力与协作精神

- 良好的自信心与独立工作的能力.

- 高度的主动性和责任感


 
具体要求:

 
- 电子工程专业硕士学位;

- 具有至少两年的FPGA设计的职业经验。尤其侧重无线通信物理层的设计

- 具有很强的用HDL语言开发芯片能力.

- 熟练掌握FPGA开发流程(能熟练使用ModelSim, VCS, Synplify pro, ISE等软件)

- 理解DVB-T/H, ATSC和中国新标准.
 
 


Corporate Research Lab Beijing is looking for :


Research Engineer –Digital TV FPGA-based Receiver Design


Laboratory :Communication  


Reports to : Group leader (Title TBC) 


Vacancies: 2


Context :


In the context of advanced wireless communication technologies for audio/video distribution, the job holder design, develops and demonstrates advanced algorithms applicable to FPGA/IC solution.


Job description :  


- Responsible to RTL coding based on fixed-point models using HDL languages

- Responsible to RTL simulation and FPGA debugging/verification for Digital TV (DTV) terrestrial broadcasting FPGA-based receiver.

- Responsible to integrate all the RTL codes from system level.

-  Work closely with other research center of worldwide for IC solutions to address these markets.

- Contribute to the patent portfolio by protecting inventions.


-

Required profile : 


General
- Experience of team working: Mandatory. More than 2 years of experience

- Fluent English language: Mandatory,

- Good communication capability: Mandatory,

- Good self-sufficiency: Mandatory.

- High degree of initiative and responsibility


Specific
- MS degree in electrical engineering.

- 2+ year hand-on FPGA design experience on wireless PHY layer algorithms development, including RTL coding, RTL simulation and synthesis.

- Excellent programming skills in HDL language

- Good knowledge of EDA tools: ModelSim, VCS, Synplify pro, ISE, etc

- Algorithm design experiences in digital communication field are preferred.

- Understanding DVB-T/H, ATSC, Chinese DTV terrestrial standards is a plus.

责任编辑:穿鞋子的猫  收藏此页到365Key   
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