Our client is a fortune 500 high-tech company, now we are looking for the following position. Anyone who has interest, pls send your updated CV to tchen@antal.com.cn
Thanks!
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研发工程师 – 数字电视接收机算法设计
部门/实验室 ：通信 任职地点：北京
直接报告主管/ 职位 ：组内负责人 (Title TBC) 职级：
职位空缺： 4 (CRBJCOM01-a)
职责总述：
任职者的职责是设计应用在数字电视解调芯片中的算法，并在FPGA平台上实现，验证该算法，为公司的核心芯片提供最优的解决方案。
职位描述 ：
- 负责数字广播电视地面/手持接收解调器的算法设计.
- 通过浮点，定点算法仿真验证设计的算法的性能和可实现性
- 与硬件开发人员共同研究，调试算法的RTL实现和FPGA平台上的验证
- 参与国际广播传输系统标准的相关工作
- 与全球其他研发中心紧密合作，为芯片市场提供更优的解决方案.
- 提出新发明获得专利权
- 在数字信号处理，无线通信领域引领高效的新技术研发；
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职位要求 ：
总体要求
- 至少两年的合作项目的经历
- 熟练使用英语，良好的口语与书面交流能力
- 良好的沟通能力与协作精神
- 良好的自信心与独立工作的能力.
- 高度的主动性和责任感
具体要求：
- 电子工程专业硕士或博士学位；
- 具有至少两年的独立数字通信算法研究的职业经验。尤其侧重数字电视解调器的设计，比如信道均衡/估计技术，同步技术，信道编解码。
- 具有无线通信领域物理层的FPGA设计经验.
- 理解DVB-T/H, ATSC和中国新标准DTMB.
Corporate Research Lab Beijing is looking for :
Research Engineer –Digital TV Receiver Algorithm Design
Laboratory :Communication
Reports to : Group leader (Title TBC)
Vacancies: 4
Context :
In the context of advanced wireless communication technologies for audio/video distribution, the job holder design, develops and demonstrates advanced algorithms applicable to FPGA/IC solution
Job description :
- Responsible for algorithm design for Digital TV (DTV) terrestrial/handheld broadcasting receiver.
- Responsible for floating-point, fixed-point simulation to verify the proposed algorithms
- Provide support to implementation engineer on algorithm RTL coding and FPGA verifications
- Actively participate in standardization bodies to push Thomson technology.
- Work closely with other research centers worldwide for IC solutions to address these markets.
- Contribute to the Thomson patent portfolio by protecting inventions.
- Propose new research directions in wireless communication field.
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Required profile :
General
- Experience of team working: Mandatory. More than 2 years of experience
- Fluent English language: Mandatory,
- Good communication capability: Mandatory,
- Good self-sufficiency: Mandatory.
- High degree of initiative and responsibility
Specific
- MS or Ph.D degree in electrical engineering.
- +2 year individual algorithm design experiences in digital communication field. Especially the design experience with DTV receiver technologies (channel estimation/equalizeris, synchronization, channel decoding, etc) are preferred.
- Hand-on FPGA design experience on wireless PHY layer algorithms, including RTL coding, simulation and synthesis is plus.
- Understanding DVB-T/H, ATSC, Chinese DTV terrestrial standards is a plus.
